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Moving Towards Microchannel-based Chip Cooling

High-performance computing (HPC) systems have increased power consumption and heat generation, posing thermal challenges that limit system performance. Traditional methods such as air cooling and immersion remain inadequate and increase the interest in liquid cooling: backside-of-die and micro cooler-bonded systems have been researched using different architectures and fluids. This report highlights the need to explore wafer-level approaches, emphasizing their potential to mitigate processing challenges and reduce risks. Key considerations for chip-based micro cooling integration in HPC systems are presented with insights from a SEMI-convened committee to recommend the next steps for transitioning these cooling technologies into production.

The report includes the following elements:

• Review of advanced packaging approaches utilized in HPC applications, including heterogenous integration, 2D/2.5D/3D chip packaging architectures, and combinations of these arrangements
• Summary of reported results of on-chip cooling research, focusing on microchannel cold-plates and microchannels etched into die
• Key process technologies required for creating microchannels, and the maturity of each
• A proposed thermal test vehicle for evaluating commercial implementation of microchannels is described
• Key issues are identified, and suggestions for next steps, in particular, the CHIPS for America’s National Advanced Packaging Manufacturing Program (NAPMP) is identified as an opportunity for collaborative development among the HPC supply chain